EM=LITTLEENDIAN, CLKR=PORRESET
Configures operation of the memory controller
| EM | Endian mode. On power-on reset, the value of the endian bit is 0. All data must be flushed in the EMC before switching between little-endian and big-endian modes. 0 (LITTLEENDIAN): Little-endian mode (POR reset value). 1 (BIGENDIAN): Big-endian mode. |
| RESERVED | Reserved. Read value is undefined, only zero should be written. |
| CLKR | CCLK: CLKOUT ratio. This bit must contain 0 for proper operation of the EMC. 0 (PORRESET): 1:1(POR reset value) 1 (DONOTUSE): 1:2 (this option is not available on the LPC178x/177x) |
| RESERVED | Reserved. Read value is undefined, only zero should be written. |